| Test Details | |
| Schematic | 6.3_LTC3406B - DVM ADVANCED.sxsch |
| Test | VOUT=0.6V w NoCurves NoScalars NoSpecs|Bode Plot|Vin Maximum|50% Load |
| Date / Time | 12/10/2015 5:52 PM |
| Report Directory | suppress_spec_gen\VOUT=0.6Vw NoCurves NoScalars NoSpecs\Bode Plot\Vin Maximum\50% Load |
| Log File | report.txt |
| Screenshot | schematic.png |
| Status | PASS |
| Simulator | simplis |
| Deck | input.deck |
| Init | input.deck.init |
| Measured Scalar Values | |
| Efficiency | 76.7746% |
| Frequency(CLK) | 955.697k |
| gain_crossover_freq | 19.9547k |
| gain_margin | 33.8124 |
| min_phase | 39.869 |
| min_phase_freq | 19.9547k |
| phase_crossover_freq | 335.599k |
| phase_margin | 39.8687 |
| Power(LOAD) | 182.683m |
| Power(SRC) | 237.946m |
| VLOAD | AVG 605.46m MIN 602.998m MAX 606.966m RMS 605.461m PK2PK 3.96798m |
| Measured Spec Values | |
| min_gain_margin | PASS: Gain Margin (33.8124) is greater than Min. Gain Margin (12) |
| min_phase_margin | PASS: Phase Margin (39.8687) is greater than Min. Phase Margin (35) |
![]() Bode Plot
GAIN
PHASE
|
|
| SXGPH File | simplis_ac6_316.sxgph |
![]() LOAD
VLOAD
|
|
| SXGPH File | simplis_pop8_299.sxgph |
![]() SRC
ISRC
VSRC
|
|
| SXGPH File | simplis_pop8_289.sxgph |
![]() default
CLK
ILOUT
SW
VOUT
|
|
| SXGPH File | simplis_pop8_294.sxgph |
| Other SXGPH Files | |
| clock#pop | simplis_pop8_281.sxgph |