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» DVM Test Report: Efficiency and Loop Characterization|Vin Minimum|5% Load
| Test Details | |
| Schematic | 8.2_LLC Closed Loop.sxsch |
| Test | Efficiency and Loop Characterization|Vin Minimum|5% Load |
| Date / Time | 12/10/2015 6:13 PM |
| Report Directory | measure_loop_param\Efficiencyand Loop Characterization\Vin Minimum\5% Load |
| Log File | report.txt |
| Screenshot | schematic.png |
| Status | PASS |
| Simulator | simplis |
| Deck | input.deck |
| Init | input.deck.init |
| Measured Scalar Values | |
| Efficiency | 93.5266% |
| eta_min | 93.5266% |
| Frequency(CLK) | 81.7975k |
| gain_crossover_freq | 838.986 |
| gain_margin | 28.712 |
| gmargin_min | 28.712 |
| gxover_min | 838.986 |
| ILOAD | AVG 251.461m MIN 251.432m MAX 251.51m RMS 251.461m PK2PK 77.9008u |
| iload_min | 251.461m |
| ISRC | AVG 18.0128m MIN -555.716m MAX 576.704m RMS 240.622m PK2PK 1.13242 |
| min_phase | 97.9727 |
| min_phase_freq | 92.3644 |
| phase_crossover_freq | 38.3577k |
| phase_margin | 116.172 |
| pmargin_min | 116.172 |
| Power(LOAD) | 6.05942 |
| Power(SRC) | 6.47882 |
| sw_freq_min | 81.7975k |
| VLOAD | AVG 24.0969 MIN 24.0943 MAX 24.1013 RMS 24.0969 PK2PK 6.99495m |
| VSRC | AVG 359.998 MIN 359.942 MAX 360.056 RMS 359.998 PK2PK 113.242m |
| Measured Spec Values | |
| Max_VLOAD | PASS: Max. Output1 Voltage (24.1013) is less than or equal to Max. Output1 Voltage Spec (25.2) |
| Min_VLOAD | PASS: Min. Output1 Voltage (24.0943) is greater than or equal to Min. Output1 Voltage Spec (22.8) |
| min_gain_margin | PASS: Gain Margin (28.712) is greater than Min. Gain Margin (12) |
| min_phase_margin | PASS: Phase Margin (116.172) is greater than Min. Phase Margin (35) |
 Bode Plot
GAIN
PHASE
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| SXGPH File | simplis_ac29_1734.sxgph |
 LOAD
VLOAD
ILOAD
|
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| SXGPH File | simplis_pop29_1700.sxgph |
 SRC
VSRC
ISRC
|
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| SXGPH File | simplis_pop29_1690.sxgph |
 Primary
IDQ1
IDQ2
Im
Ip
Ir
VSW
|
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| SXGPH File | simplis_pop29_1681.sxgph |
 Secondary
CLK
ICout
Is1
Is2
Vs
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| SXGPH File | simplis_pop29_1695.sxgph |
| Other SXGPH Files | |
| default#1723#pop | simplis_pop29_1723.sxgph |
| Modulator#pop | simplis_pop29_1728.sxgph |
